CHERI Alliance formed to promote memory security tech ... but where's Arm?

A new CHERI Alliance CIC—comprising the FreeBSD Foundation, Capabilities Limited, SCI Semiconductor, Codasip, lowRISC, and the University of Cambridge—has been established to drive adoption of CHERI (Capability Hardware Enhanced RISC Instructions) for fine-grained, hardware-enforced memory safety, aiming to align specifications, raise awareness, and accelerate collaboration, particularly around RISC-V; notably, Arm is not an initial member despite its Morello CHERI research, stating limited near-term commercial opportunities while continuing evaluation and partner work ahead of the alliance’s formal launch in September.